The technology aims to turn Web browsers into semi-rich clients by projecting user interface logic for page rendering, navigation, aggregation, and cross-portlet interaction into user's browsers. 该技术通过规划用户界面逻辑,以进行页面设计、导航、聚合,并在用户浏览器中跨portlet交流,旨在将Web浏览器转化为半个用户。
It is simple but slow, especially when the user interface and logic are complicated. 这是简单的,但却是缓慢的,尤其在用户界面和逻辑复杂时。
A common architectural strategy is to layer your system, separating your user interface logic, business logic, system logic, and persistence logic from each other. 通常的构造策略是将系统分层,将用户界面逻辑、商业逻辑、系统逻辑和持久性逻辑彼此分开。
Physical units transmit information to and from the microcomputer via appropriate interface logic. 各种实体设备能够通过适当的接口逻辑电路对计算机传输(输入或输出)信息。
The realization of multiprocessor and bus interface logic were analyzed. 重点分析了多处理机及总线接口逻辑的实现。
The paper describes the structure and principle of PCI interface logic emphatically and analyzes the key of the timing design. Finally the software and hardware design scheme and simulation result of a typical application are given to demonstrate the effectiveness of our method. 文章重点介绍了PCI接口逻辑的结构原理,分析了时序设计的要点,并给出了一种典型应用的软硬件设计方案和仿真结果。
Modularized implementation of message-based VXI bus interface logic 消息基VXI总线接口逻辑的模块化实现
In order to realize a simply PCI Target interface on FPGA, building block design method was introduced. The PCI interface logic was divided into four modules. And the designing of state-machine module was emphatic introduced. 为了在FPGA上实现简化的PCI接口控制器采用模块设计的方法,将PCI接口逻辑分成四个模块,重点介绍了状态机模块的设计,并给出了存储器读操作的仿真波形。
The mechanical construction, hardware interface logic and software modules are discussed. 给出了机器人的机械构型以及硬件接口逻辑和软件模块。
Combination of artificial intelligence and database is a certain result of computer technique development, and the combination key of database and logic inference machine is the interface of logic inference machine and conventional database. 人工智能和数据库的结合是计算机技术发展的必然结果,而数据库和逻辑推理机结合的关键是逻辑推理机与传统数据库间的接口。
Compact PCI/ PCI bus is a kind of high speed bus independence of CPU. To utilize Compact PCI/ PCI bus developing digital communication manufactures of high performance, it is important to design the Compact PCI/ PCI card ′ s local bus interface logic. CompactPCI/PCI总线是一种高速的,独立于CPU的总线结构,其本地总线接口逻辑的设计是应用CompactPCI/PCI总线开发高性能数字通信产品的难点。
This paper introduces verification of AMBA AHB-compatible interface logic of a CPU chip, including verification environment, mechanism for data generation and data checking. 本文介绍了一款CPU芯片的AMBAAHB接口逻辑的设计验证工作,包括整体的验证环境,数据产生机制,以及数据检查机制。
Because of using the advanced DSP, popular high speed PCI bus and large scale FPGA, using VHDL hardware descriptive language to design the interface logic, the level of designed hardware is to a certain degree. 由于采用了先进的DSP处理芯片和结构、流行的高速总线PCI总线、大规模FPGA及VHDL硬件描述语言进行接口逻辑设计,使得整个系统具有相当高的数据处理能力。
On the basis of LDAP storage model, a information management system of users 'authentication is systematically realized, where the unified interface and logic can be used for central management of users' authentication information. 在LDAP存储模型的基础上,系统实现了统一的用户认证信息管理系统,可以通过统一的界面和逻辑对用户认证信息进行集中管理。
A high speed radar signal acquisition PCI card based on FPGA is designed to acquire radar data. FPGA is used as the kernel chip to control the data acquisition, and to implement the 32-bit/ 33 MHz PCI interface logic. 制作了一块基于FPGA的高速雷达信号采集PCI卡,以FPGA为采集的核心控制芯片,并在FPGA内部实现了32bit/33MHz的PCI接口逻辑。
Interface Logic Simulation Analyzing on High Speed Solid-state Storage Technique with CompactFlash Card Array 高速CF卡阵列固态存储技术的接口逻辑仿真分析
On the basis of this, a modularized message-based VXI bus interface logic is implemented in FPGA. 并以此为基础在FPGA中实现了模块化的消息基VXI总线接口逻辑。
The main research work of this thesis is as follows: ( 1) The design of gather and the pattern-recognition interface logic. 采集与模式识别接口逻辑的设计。
An interface logic design and interface hardware used in extending functions are introduced. 使用文中介绍的方案,能有效地扩充系统的诸多功能。
By using FPGA and the VHDL hardware descriptive language, the interface logic between the analog signal acquisition module and the interface of SHARC is designed and realized. 其中包括板子的总体设计,原理图设计、电路板设计,电路板焊装与调试。2.采用FPGA器件,并利用VHDL语言完成各部分逻辑接口的设计和对数据采集的控制。
Advanced process makes it possible to integrate the processor, memory, analog circuits, interface logic and even radio frequency circuit on a large scale chip to form a System-on-Chip SoC. 先进的工艺使得人们能够把处理器、存储器、模拟电路、接口逻辑甚至射频电路集成到一个大规模的芯片上,形成SoC片上系统。
On the chip through the FPGA logic control, the main design of the SPI serial interface logic, string, and the conversion process and external expansion of range of the relay control logic. 通过FPGA对芯片进行逻辑控制,主要设计了SPI串口逻辑、串并转换程序和外部扩展量程的继电器控制逻辑。
VME bus interface, CPLD interface logic control. 在VME总线接口上,采用CPLD进行接口逻辑控制。
By introducing MVP architecture into legacy system frontend redevelopment work, user interface logic code can be separated from view code. As the result, the reusability and testability of business logic code is greatly enhanced, and the efficiency of development and test work is improved accordingly. 在遗留系统前台界面重构工作中引入了MVP架构,使得界面逻辑代码与显示代码分离开来,有效增强了界面逻辑代码的复用性和易测性,从而提高了开发和测试的效率。
FPGA logic, including the transmitter logic, the receiver logic and USB interface logic, is integrated in the same project. You can use the mode selection command to select the appropriate part of the work. FPGA的逻辑设计包括发送方逻辑、接收方逻辑和USB接口逻辑三部分,整合在同一个工程中,可使用模式选择命令选择相应部分工作。
Through the business logic and interface logic separation, the maintainability of the whole system greatly enhances and the system whose expansion has become very easy can support multiple clients. 通过业务逻辑和界面逻辑的分离,使整个系统的可维护性大大加强,系统可以方便的支持多重客户端,进行扩充也变得非常容易。
First, the thorough analysis on VME bus interface is carried out: the operation principle and mechanism of the data transfer bus and priority interrupt bus, providing the foundation for VME interface logic design. 首先,对VME总线接口进行了深入分析,包括数据传输总线和优先级中断总线的操作原理与运行机制,为VME接口逻辑设计提供了基础。